Title :
Multicore Simulation of Transaction-Level Models Using the SoC Environment
Author :
Chen, Weiwei ; Han, Xu ; Doemer, R.
Author_Institution :
Electr. Eng. & Comput. Sci. Dept., Univ. of California, Irvine, CA, USA
Abstract :
Editor´s note: To address the limitations of discrete-event simulation engines, this article presents an extension of the SoC simulation kernel to support parallel simulation on multicore hosts. The proposed optimized simulator enables fast validation of large multicore SoC designs by issuing multiple simulation threads simultaneously while ensuring safe synchronization.
Keywords :
multiprocessing systems; system-on-chip; SoC environment; discrete-event simulation engines; multicore hosts; multicore simulation; parallel simulation; transaction level models; Computational modeling; Multicore processing; Parallel processing; Simulation; Solid modeling; Synchronization; System-on-a-chip; Transaction databases; ESL design; H.264; JPEG encoder; SCE; SoC environment; design and test; multicore parallel simulation; video decoder;
Journal_Title :
Design & Test of Computers, IEEE
DOI :
10.1109/MDT.2011.43
