Title :
Interactive Debug of SoCs with Multiple Clocks
Author :
Vermeulen, Bart ; Goossens, Kees
Author_Institution :
NXP Semicond., Netherlands
Abstract :
Systems with elaborate multiple clock distributions are a necessity, and the authors address the postfabrication debug of such multiclock systems. Solutions, based on the authors´ communication-centric debug approach, are presented that achieve a consistent snapshot of the system state and force the erroneous state in the face of nondeterminism.
Keywords :
clocks; electronic engineering computing; interactive systems; system-on-chip; communication centric debug approach; interactive SoC debugging; multiple clock distribution; postfabrication debug; Debugging; IP networks; Monitoring; Multicore processing; Synchronization; System-on-a-chip; communication-centric debug; consistent global state dumps; debug abstraction techniques; design and test; embedded SoC; handshake signals; multiple clocks; network on chip; silicon debug; silicon validation; software debug;
Journal_Title :
Design & Test of Computers, IEEE
DOI :
10.1109/MDT.2011.42
