Abstract :
A transistor circuit is described in which the time delay between a trigger pulse and the output pulse, is directly proportional to a control voltage over a 100 : 1 range. The delay circuit is synthesized from circuits performing the functions of ramp generation, voltage comparison and switching. The circuit uses matched dual planar transistors to achieve a temperature coefficient of 0.0025% per deg C, for temperatures between 20°C and 100°C.
