• DocumentCode
    1474840
  • Title

    Testing logic-intensive memory ICs on memory testers

  • Author

    Wu, Robert ; Gerner, Jerry ; Weelus, R. ; Lew, Kevin

  • Author_Institution
    Fast Static RAM Div., Motorola, MD, USA
  • Volume
    14
  • Issue
    1
  • fYear
    1997
  • Firstpage
    50
  • Lastpage
    54
  • Abstract
    Presents Lotom, a tool which converts logic test vectors into memory test patterns and generates a corresponding memory test program for use on an economical memory tester. The authors report a sample time savings of 99% over manual conversion
  • Keywords
    integrated circuit testing; integrated memory circuits; logic testing; Lotom; logic test vectors; memory ICs; memory test patterns; memory test program; memory testers; Built-in self-test; Circuit testing; Costs; Cyclic redundancy check; Electronic equipment testing; Integrated circuit testing; Logic testing; Pins; Software testing; Test pattern generators;
  • fLanguage
    English
  • Journal_Title
    Design & Test of Computers, IEEE
  • Publisher
    ieee
  • ISSN
    0740-7475
  • Type

    jour

  • DOI
    10.1109/54.573365
  • Filename
    573365
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=1474840