• DocumentCode
    1474933
  • Title

    Focal-plane analog VLSI cellular implementation of the boundary contour system

  • Author

    Canwenberghs, G. ; Waskiewicz, James

  • Author_Institution
    Dept. of Electr. & Comput. Eng., Johns Hopkins Univ., Baltimore, MD, USA
  • Volume
    46
  • Issue
    2
  • fYear
    1999
  • fDate
    2/1/1999 12:00:00 AM
  • Firstpage
    327
  • Lastpage
    334
  • Abstract
    We present an analog very large scale integration (VLSI) cellular architecture implementing a version of the boundary contour system (BCS) for real-time focal-plane image processing. Inspired by neuromorphic models across the retina and several layers of visual cortex, the design integrates in each pixel the functions of phototransduction and simple cells, complex cells, hypercomplex cells, and bipole cells in each of three directions interconnected on a hexagonal grid. Analog current-mode complementary metal-oxide-semiconductor (CMOS) circuits are used throughout to perform edge detection, local inhibition, directionally selective long-range diffusive kernels, and renormalizing global gain control. Experimental results from a fabricated 12×10 pixel prototype in a 1.2-μm CMOS process are included, demonstrating the robustness of the implemented BCS model in selecting image contours in a cluttered and noisy background
  • Keywords
    CMOS analogue integrated circuits; VLSI; analogue processing circuits; cellular neural nets; current-mode circuits; edge detection; focal planes; image processing equipment; image segmentation; neural chips; neural net architecture; real-time systems; 1.2 micron; 10 pixel; 12 pixel; 120 pixel; CNN chip; VLSI cellular architecture; analog current-mode CMOS circuits; boundary contour system; cluttered background; directionally selective long-range diffusive kernels; edge detection; focal-plane analog VLSI cellular implementation; hexagonal grid; local inhibition; noisy background; phototransduction; real-time focal-plane image processing; renormalizing global gain control; very large scale integration; Brain modeling; CMOS analog integrated circuits; Image edge detection; Image processing; Integrated circuit interconnections; Neuromorphics; Real time systems; Retina; Semiconductor device modeling; Very large scale integration;
  • fLanguage
    English
  • Journal_Title
    Circuits and Systems I: Fundamental Theory and Applications, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    1057-7122
  • Type

    jour

  • DOI
    10.1109/81.747215
  • Filename
    747215