Two-port representation of multi-node networks by matrix partitioning

A unified approach to linear circuit analysis is described which apart from its simplicity reduces the time required for circuit analysis on an undergraduate electronics course. Representation of a network by its indefinite admittance matrix is well established and for a w-node network would result in a n × n matrix. Reduction of this matrix to a 2 × 2 matrix is described and an easy to memorize procedure in terms of the input and output nodes is given.