DocumentCode :
147523
Title :
A talented CPU-to-GPU memory mapping technique
Author :
Asaduzzaman, Abu ; Gummadi, Deepthi ; Yip, Chok M.
Author_Institution :
Dept. of Electr. Eng. & Comput. Sci., Wichita State Univ., Wichita, KS, USA
fYear :
2014
fDate :
13-16 March 2014
Firstpage :
1
Lastpage :
6
Abstract :
In order to fast effective analysis of large systems, high performance computing (HPC) is essential. NVIDIA Compute Unified Device Architecture (CUDA)-assisted central processing unit (CPU) and graphics processing unit (GPU) computing platform has proven its potential to be used for HPC supports. In CPU/GPU computing, original data and instructions are copied from CPU-main-memory to GPU-global-memory. Inside GPU, it would be beneficial to keep the data into shared memory (shared only by the threads of that block) than in the global memory (shared by all threads). However, GPU shared memory is much smaller than GPU global memory (for Fermi Tesla C2075, total shared memory per block is 48 KB and total global memory is 5.6 GB). In this paper, we introduce a CPU-main-memory to GPU-global-memory mapping technique to improve the GPU/overall system performance by increasing the effectiveness of GPU shared memory. Experimental results, from solving Laplace´s equation for 512×512 matrix using Fermi and Kepler cards, show that proposed CPU-to-GPU memory mapping technique help decrease the overall execution time by more than 75%.
Keywords :
Laplace equations; parallel architectures; shared memory systems; CPU-main-memory; CUDA; Fermi card; GPU computing platform; GPU shared memory; GPU-global-memory mapping technique; HPC; Kepler card; Laplace´s equation; NVIDIA compute unified device architecture; assisted central processing unit; graphics processing unit computing platform; high performance computing; talented CPU-to-GPU memory mapping technique; Central Processing Unit; Graphics processing units; Instruction sets; Multicore processing; Organizations; Parallel processing; Random access memory; CUDA architecture; Cache memory organization; GPU memory; electric charge distribution; high performance computing;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
SOUTHEASTCON 2014, IEEE
Conference_Location :
Lexington, KY
Type :
conf
DOI :
10.1109/SECON.2014.6950676
Filename :
6950676
Link To Document :
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