• DocumentCode
    1475528
  • Title

    Analysis of Worst-Case Delay Bounds for On-Chip Packet-Switching Networks

  • Author

    Qian, Yue ; Lu, Zhonghai ; Dou, Wenhua

  • Author_Institution
    Sch. of Comput. Sci., Nat. Univ. of Defense Technol., Changsha, China
  • Volume
    29
  • Issue
    5
  • fYear
    2010
  • fDate
    5/1/2010 12:00:00 AM
  • Firstpage
    802
  • Lastpage
    815
  • Abstract
    In network-on-chip (NoC), computing worst-case delay bounds for packet delivery is crucial for designing predictable systems but yet an intractable problem. This paper presents an analysis technique to derive per-flow communication delay bound. Based on a network contention model, this technique, which is topology independent, employs network calculus to first compute the equivalent service curve for an individual flow and then calculate its packet delay bound. To exemplify this method, this paper also presents the derivation of a closed-form formula to compute a flow´s delay bound under all-to-one gather communication. Experimental results demonstrate that the theoretical bounds are correct and tight.
  • Keywords
    delays; network-on-chip; packet switching; communication delay bound; network-on-chip; on-chip packet-switching networks; packet delay bound; worst-case delay bound analysis; Calculus; Computer networks; Delay; Network topology; Network-on-a-chip; Performance analysis; Quality of service; Switches; Telecommunication traffic; Traffic control; Delay bound; network calculus; network-on-chip; performance analysis; quality-of-service;
  • fLanguage
    English
  • Journal_Title
    Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0278-0070
  • Type

    jour

  • DOI
    10.1109/TCAD.2010.2043572
  • Filename
    5452093