• DocumentCode
    1475634
  • Title

    Energy Optimization for Many-Core Platforms: Communication and PVT Aware Voltage-Island Formation and Voltage Selection Algorithm

  • Author

    Majzoub, Sohaib S. ; Saleh, Resve A. ; Wilton, Steven J E ; Ward, Rabab K.

  • Author_Institution
    Dept. of Electr. & Comput. Eng., Univ. of British Columbia, Vancouver, BC, Canada
  • Volume
    29
  • Issue
    5
  • fYear
    2010
  • fDate
    5/1/2010 12:00:00 AM
  • Firstpage
    816
  • Lastpage
    829
  • Abstract
    In this paper, we propose a novel approach to voltage-island formation, for the energy optimization of many-core architectures, which mitigates the impact of process, voltage, and temperature (PVT) variations. The islands are created by balancing their shape constraints imposed by intra and inter-island communication with the desire to limit the spatial extent of each island to minimize PVT impact. In addition, to reduce the number of voltage levels in the design, we propose an efficient voltage selection approach that provides near optimal results, for a set of 33 examined cases, with more than a ten times speedup compared to the best-known previous methods. This run-time improvement is important, especially for large many-core platforms. Finally, we present an evaluation platform considering pre-fabrication and post-fabrication PVT scenarios where multiple applications with hundreds to thousands of tasks are mapped onto many-core platforms with hundreds to thousands of cores to evaluate the proposed techniques. Results show that the average energy savings for 33 test cases using the proposed methods are 37% compared to 16% obtained using previous methods.
  • Keywords
    integrated circuit design; microprocessor chips; PVT aware voltage-island formation; energy optimization; many-core architecture platforms; voltage selection algorithm; Energy consumption; Frequency; Multicore processing; Process design; Runtime; Shape; Temperature; Testing; Timing; Voltage; Energy optimization; frequency scaling; many-core; multicore; network-on-chip; process; temperature (PVT) variation; voltage; voltage scaling; voltage selection problem; voltage-island; within-die variation;
  • fLanguage
    English
  • Journal_Title
    Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0278-0070
  • Type

    jour

  • DOI
    10.1109/TCAD.2010.2043587
  • Filename
    5452113