A compact model for compound semiconductor tunneling field-effect-transistors

This paper proposes a compact behavioral model for homojunction compound semiconductor-based tunneling field effect transistors. The approach used here consists of using equations derived from basic device physics used previously for similar silicon based transistors but modified for InAs materials and measured 20 nm gate length experimental device parameters. The results of the calculated output transfer characteristics agree well over a wide range of gate voltage values. The ultimate goal is to implement this model in a circuit simulator for designing and testing of tunneling field effect transistors (TFET)-based circuits for low power applications.