New phase-mode logic gates with large operating regions of circuit parameters

Author

Onomi, Takeshi ; Yanagisawa, Kiyoshi ; Nakajima, Koji

Author_Institution

Res. Inst. of Electr. Commun., Tohoku Univ., Sendai, Japan

Volume

11

Issue

1

fYear

2001

fDate

3/1/2001 12:00:00 AM

Firstpage

974

Lastpage

977

Abstract

We propose new phase-mode logic gates with large operating regions of circuit perimeters. In the phase-mode logic, logic circuits are realized by combination of ICF (INHIBIT controlled by fluxon) gates. The function of the ICF gate can be achieved by the two gates which are an INHIBIT gate and an AND gate. These two gates are fabricated by NEC 2.5 kA/cm² Nb/AlOx/Nb standard process and successfully demonstrated. A Monte-Carlo calculation is used for evaluating yields of the gates. From 1000 calculations for each gates, we show that each yield of the INHIBIT gate and the AND gate does not decrease with increasing σ=7% and σ=9% which are the standard deviations of the parameter spreads. A realization of high-reliability LSI circuits will be expected by using these gates

Keywords

Monte Carlo methods; logic gates; network parameters; superconducting logic circuits; AND gate; ICF gate; INHIBIT gate; LSI circuit; Monte Carlo simulation; Nb-AlO-Nb; Nb/AlOx/Nb junction technology; SFQ logic; circuit parameters; phase mode logic gate; superconducting digital device; Distributed parameter circuits; Josephson junctions; Large scale integration; Logic circuits; Logic devices; Logic gates; National electric code; Niobium; Superconducting transmission lines; Telephony;

fLanguage

English

Journal_Title

Applied Superconductivity, IEEE Transactions on

Publisher

ieee

ISSN

1051-8223

Type

jour

DOI

10.1109/77.919511

Filename

919511