DocumentCode :
1476098
Title :
Model-Based Verification and Estimation Framework for Dynamically Partially Reconfigurable Systems
Author :
Huang, Chun-Hsian ; Hsiung, Pao-Ann
Author_Institution :
Dept. of Comput. Sci. & Inf. Eng., Nat. Chung Cheng Univ., Chiayi, Taiwan
Volume :
7
Issue :
2
fYear :
2011
fDate :
5/1/2011 12:00:00 AM
Firstpage :
287
Lastpage :
301
Abstract :
Unified Modeling Language (UML), an industry de-facto standard, has been used to analyze dynamically partially reconfigurable systems (DPRS) that can reconfigure their hardware functionalities on-demand at runtime. To make model-driven architecture (MDA) more realistic and applicable to the DPRS design in an industrial setting, a model-based verification and estimation (MOVE) framework is proposed in this work. By taking advantage of the inherent features of DPRS and considering real-time system requirements, a semiautomatic model translator converts the UML models of DPRS into timed automata models with transition urgency semantics for model checking. Furthermore, a UML-based hardware/software co-design platform (UCoP) is proposed to support the direct interaction between the UML models and the real hardware architecture. The two-phase verification process, including exhaustive functional verification and physical-aware performance estimation, is completely model-based, thus reducing system verification efforts. We used a dynamically partially reconfigurable network security system (DPRNSS) as a case study. The related experiments have demonstrated that the model checker in MOVE can alleviate the impact of the state-space-explosion problem. Compared to the synthesis-based estimation method having inaccuracies ranging from -43.4% to 18.4%, UCoP can provide accurate and efficient platform-specific verification and estimation through actual time measurements.
Keywords :
Unified Modeling Language; formal verification; hardware-software codesign; reconfigurable architectures; UML models; UML-based hardware/software codesign platform; Unified Modeling Language; dynamically partially reconfigurable network security system; dynamically partially reconfigurable systems; exhaustive functional verification; hardware architecture; hardware functionalities; model checking; model-based estimation framework; model-based verification framework; model-driven architecture; physical-aware performance estimation; real-time system requirements; semiautomatic model translator; timed automata models; transition urgency semantics; two-phase verification process; Analytical models; Computer architecture; Estimation; Field programmable gate arrays; Hardware; Software; Unified modeling language; Dynamically partially reconfigurable systems; unified modeling language (UML); verification and estimation;
fLanguage :
English
Journal_Title :
Industrial Informatics, IEEE Transactions on
Publisher :
ieee
ISSN :
1551-3203
Type :
jour
DOI :
10.1109/TII.2011.2123901
Filename :
5735172
Link To Document :
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