Reset Switching Probability of Resistive Switching Devices

Author

Chen, An ; Lin, Ming-Ren

Author_Institution

Strategic Technol. Group, GLOBAL FOUNDRIES, Sunnyvale, CA, USA

Volume

32

Issue

5

fYear

2011

fDate

5/1/2011 12:00:00 AM

Firstpage

590

Lastpage

592

Abstract

The reset switching probability of resistive switching devices is characterized in array testing. The measured switching probability can be quantitatively explained based on the mechanism of a thermally activated reset process. An analytical model of switching probability is developed to describe the dependence of reset probability on operation parameters, including applied voltage, selection transistor gate voltage, and pulsewidth. The close fitting of the model with measurement also confirms the thermal reset mechanism. This quantitative switching probability model can be used to extrapolate key device parameters and may provide important guidance in yield improvement and memory evaluation.

Keywords

CMOS memory circuits; MIM devices; circuit testing; copper compounds; integrated circuit modelling; probability; switching circuits; Cu₂O; MIM device; applied voltage; array testing; memory arrays; pulsewidth; reset switching probability; resistive switching devices; selection transistor gate voltage; storage capacity 64 Kbit; thermal activated reset process; thermal reset mechanism; Arrays; MIM devices; Probability; Resistance; Switches; Transistors; Voltage measurement; Resistive switching; switching probability; yield;

fLanguage

English

Journal_Title

Electron Device Letters, IEEE

Publisher

ieee

ISSN

0741-3106

Type

jour

DOI

10.1109/LED.2011.2109933

Filename

5735177