A low-power, high-performance, 1024-point FFT processor

Author

Baas, Bevan M.

Author_Institution

Dept. of Electr. Eng., Stanford Univ., CA, USA

Volume

34

Issue

3

fYear

1999

fDate

3/1/1999 12:00:00 AM

Firstpage

380

Lastpage

387

Abstract

This paper presents an energy-efficient, single-chip, 1024-point fast Fourier transform (FFT) processor. The 460000-transistor design has been fabricated in a standard 0.7 μm (L_poly=0.6 μm) CMOS process and is fully functional on first-pass silicon. At a supply voltage of 1.1 V, it calculates a 1024-point complex FFT in 330 μs while consuming 9.5 mW, resulting in an adjusted energy efficiency more than 16 times greater than the previously most efficient known FFT processor. At 3.3 V, it operates at 173 MHz-which is a clock rate 2.6 times greater than the previously fastest rate

Keywords

CMOS digital integrated circuits; cache storage; digital signal processing chips; fast Fourier transforms; high-speed integrated circuits; low-power electronics; memory architecture; 0.6 micron; 1.1 to 3.3 V; 1024-point FFT processor; 173 MHz; 330 mus; 9.5 mW; CMOS process; energy-efficient single-chip implementation; fast Fourier transform processor; high-performance FFT processor; low-power FFT processor; CMOS process; Digital signal processing chips; Energy efficiency; Fast Fourier transforms; Helium; Memory architecture; Pipelines; Read-write memory; Signal processing algorithms; Voltage;

fLanguage

English

Journal_Title

Solid-State Circuits, IEEE Journal of

Publisher

ieee

ISSN

0018-9200

Type

jour

DOI

10.1109/4.748190

Filename

748190