Title :
RTD/CMOS nanoelectronic circuits: thin-film InP-based resonant tunneling diodes integrated with CMOS circuits
Author :
Bergman, J.I. ; Chang, J. ; Joo, Y. ; Matinpour, B. ; Laskar, J. ; Jokerst, N.M. ; Brooke, M.A. ; Brar, B. ; Beam, E., III
Author_Institution :
Georgia Inst. of Technol., Atlanta, GA, USA
fDate :
3/1/1999 12:00:00 AM
Abstract :
The combination of resonant tunneling diodes (RTDs) and complementary metal-oxide-semiconductor (CMOS) silicon circuitry can offer substantial improvement in speed, power dissipation, and circuit complexity over CMOS-only circuits. We demonstrate the first integrated resonant tunneling CMOS circuit, a clocked 1-bit comparator with a device count of six, compared with 21 in a comparable all-CMOS design. A hybrid integration process is developed for InP-based RTDs which are transferred and bonded to CMOS chips. The prototype comparator shows sensitivity in excess of 10/sup 6/ VIA, and achieves error-free performance in functionality testing. An optimized integration process, under development, can yield high-speed, low power circuits by lowering the high parasitic capacitance associated with the prototype circuit.
Keywords :
CMOS integrated circuits; III-V semiconductors; capacitance; comparators (circuits); indium compounds; low-power electronics; nanotechnology; resonant tunnelling diodes; III-V semiconductors; InP; RTD/CMOS nanoelectronic circuits; circuit complexity; clocked 1-bit comparator; error-free performance; functionality testing; low power circuits; parasitic capacitance; power dissipation; resonant tunneling diodes; sensitivity; speed; Clocks; Complexity theory; Diodes; Power dissipation; Prototypes; RLC circuits; Resonance; Resonant tunneling devices; Silicon; Thin film circuits;
Journal_Title :
Electron Device Letters, IEEE