Title :
Analogue CMOS Hebbian synapses
Author_Institution :
Dept. of Electr. & Comput. Eng., Manitoba Univ., Winnipeg, Man., Canada
fDate :
4/25/1991 12:00:00 AM
Abstract :
CMOS VLSI circuits for the implementation of analogue Hebbian synapses with in situ learning have been designed, fabricated and tested. Investigations show that neural architectures of this type can tolerate highly imperfect analogue computational components, resulting in single-chip neural networks performing six to 20 billion multiplications per second.
Keywords :
CMOS integrated circuits; VLSI; analogue computer circuits; learning systems; linear integrated circuits; neural nets; parallel architectures; CMOS VLSI circuits; analogue Hebbian synapses; neural architectures; onchip learning; single-chip neural networks;
Journal_Title :
Electronics Letters
DOI :
10.1049/el:19910489
