Double-SOI Wafer-Bonded CMUTs With Improved Electrical Safety and Minimal Roughness of Dielectric and Electrode Surfaces

Despite myriad potential advantages over piezoelectric ultrasound transducers, capacitive micromachined ultrasound transducers (CMUTs) have not yet seen widespread commercial implementation. The possible reasons for this may include key issues of the following: (1) long-term device reliability and (2) electrical safety issues associated with relatively high voltage electrodes on device surfaces which could present an electrical safety hazard to patients. A CMUT design presented here may mitigate some of these problems. Dielectric charging is one phenomenon which can lead to unpredictable performance and device failure. Using a previously published 1-D model of dielectric charging, we link minimal dielectric surface roughness with minimal dielectric charging. Previous studies of Fowler-Nordheim tunneling suggest that minimal-surface-roughness electrodes could lead to minimal transdielectric currents (and, hence, slower dielectric charging rates). These principles guided our device architecture, leading us to engineer near atomically smooth electrodes and dielectric surfaces to minimize dielectric charging. To provide maximum electrical safety to future patients, CMUT devices were engineered with the top membrane serving as a ground electrode. While multiple CMUT elements have not been individually addressable in most such designs to our knowledge, we introduce a fabrication method involving two silicon-on-insulator wafers with a step to define individually addressable electrodes. Our devices are modeled using a finite-element package. Measured deflections show excellent agreement with modeled performance. We test for charge effects by studying deflection hysteresis during snapdown and snapback cycles in the limit of long snapdown durations to simulate maximal-dielectric-charging conditions. Devices were also tested in long-term actuation tests and subjected to more than 3 × 10¹⁰ cycles without failure.