DocumentCode
1480816
Title
Performance Comparison of Silicon Steep Subthreshold FETs
Author
Tura, Ahmet ; Woo, Jason C S
Author_Institution
Dept. of Electr. Eng., Univ. of California, Los Angeles, CA, USA
Volume
57
Issue
6
fYear
2010
fDate
6/1/2010 12:00:00 AM
Firstpage
1362
Lastpage
1368
Abstract
In the last few decades, MOSFET scaling has enabled smaller and faster transistors that consume less power per operation. However, as device dimensions were shrunk into the sub-65-nm regime, nonscalability of the subthreshold swing to below 60 mV/dec has resulted in a significant increase in off-state current and standby power dissipation. The impact ionization FET, p-i-n and p-n-p-n tunnel FET, feedback FET, and nanoelectromechanical FET were proposed as novel device concepts that achieve sharper swings than 60 mV/dec. As a result, these devices potentially enable reduced operation and considerable reduction in system power. In this paper, a detailed comparison of these steep subthreshold devices in terms of speed and power is presented, and the challenges for each device to become a viable MOSFET alternative are outlined.
Keywords
MOSFET; p-n junctions; superconductive tunnelling; MOSFET scaling; feedback FET; impact ionization FET; nanoelectromechanical FET; p-i-n; p-n-p-n tunnel FET; silicon steep subthreshold FET; size 65 nm; standby power dissipation; Electrons; FETs; Feedback; Impact ionization; MOSFET circuits; PIN photodiodes; Power MOSFET; Power dissipation; Silicon; Tunneling; Feedback FET (FBFET); impact ionization MOSFET (IMOS); nanoelectromechanical FET (NEMFET); tunnel FET (TFET);
fLanguage
English
Journal_Title
Electron Devices, IEEE Transactions on
Publisher
ieee
ISSN
0018-9383
Type
jour
DOI
10.1109/TED.2010.2047066
Filename
5456159
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