Title :
A chip set for lossless image compression
Author :
Shah, Imran Ali ; Akiwumi-Assani, Olu ; Johnson, Brian
Author_Institution :
North American Philips Corp., Briarcliff Manor, NY, USA
fDate :
3/1/1991 12:00:00 AM
Abstract :
The authors describe two chips which form the basis of a high-speed lossless image compression/decompression system. They present the transform and coding algorithms and the main architectural features of the chips and outline some performance specifications. Lossless compression can be achieved by a transformation process followed by entropy coding. The two application-specific integrated circuits (ASICs) perform S-transform image decomposition and the Lempel-Ziv (L-Z) type of entropy coding. The S-transform, besides decorrelating the image, provides a convenient method of hierarchical image decomposition. The data compressor/decompressor IC is a fast and efficient implementation of the L-Z algorithm. The chips can be used independently or together for image compression
Keywords :
application specific integrated circuits; data compression; encoding; picture processing; Lempel-Ziv entropy coding; S-transform; S-transform image decomposition; application-specific integrated circuits; coding algorithms; decompression; entropy coding; hierarchical image decomposition; lossless image compression; performance specifications; transformation process; Circuits; Decorrelation; Digital images; Entropy coding; Image coding; Image decomposition; Karhunen-Loeve transforms; Laboratories; Pixel; Radiography;
Journal_Title :
Solid-State Circuits, IEEE Journal of