Title :
Design of reliable VLSI circuits using simulation techniques
Author :
Hsu, Wen-jay ; Sheu, Bing J. ; Gowda, Sudhir M.
Author_Institution :
Dept. of Electr. Eng., Univ. of Southern California, Los Angeles, CA, USA
fDate :
3/1/1991 12:00:00 AM
Abstract :
An iterative simulation method of predicting the impact of progressive device degradation on circuit performance due to common microelectronic failure mechanisms is described. Simulation schemes for the lifetime prediction of ASICs as well as modeling requirements for accurate and efficient simulation are presented. These simulation schemes have been implemented in the prototype reliability simulator RELY to evaluate circuit performance degradation and provide reliability enhancement information. Hot-carrier effects on submicrometer digital and analog circuits are used to demonstrate the approach. Experimental results on precharging circuitry for sense amplifiers and operational amplifiers are presented
Keywords :
VLSI; application specific integrated circuits; circuit CAD; circuit analysis computing; circuit reliability; digital integrated circuits; digital simulation; hot carriers; integrated circuit technology; iterative methods; linear integrated circuits; semiconductor device models; ASICs; CAD; RELY; analog circuits; circuit performance; circuit performance degradation; hot carrier effects; iterative simulation method; lifetime prediction; microelectronic failure mechanisms; modeling requirements; operational amplifiers; precharging circuitry; progressive device degradation; prototype reliability simulator; reliability enhancement information; reliable VLSI circuits; sense amplifiers; submicron digital circuits; Circuit optimization; Circuit simulation; Degradation; Failure analysis; Iterative methods; Microelectronics; Operational amplifiers; Predictive models; Very large scale integration; Virtual prototyping;
Journal_Title :
Solid-State Circuits, IEEE Journal of
