• DocumentCode
    1481803
  • Title

    Scalable parallel computers for real-time signal processing

  • Author

    Hwang, Kai ; Xu, Zhiwei

  • Author_Institution
    Hong Kong Univ., Hong Kong
  • Volume
    13
  • Issue
    4
  • fYear
    1996
  • fDate
    7/1/1996 12:00:00 AM
  • Firstpage
    50
  • Lastpage
    66
  • Abstract
    We assess the state-of-the-art technology in massively parallel processors (MPPs) and their variations in different architectural platforms. Architectural and programming issues are identified in using MPPs for time-critical applications such as adaptive radar signal processing. We review the enabling technologies. These include high-performance CPU chips and system interconnects, distributed memory architectures, and various latency hiding mechanisms. We characterize the concept of scalability in three areas: resources, applications, and technology. Scalable performance attributes are analytically defined. Then we compare MPPs with symmetric multiprocessors (SMPs) and clusters of workstations (COWs). The purpose is to reveal their capabilities, limits, and effectiveness in signal processing. We evaluate the IBM SP2 at MHPCC, the Intel Paragon at SDSC, the Gray T3D at Gray Eagan Center, and the Gray T3E and ASCI TeraFLOP system proposed by Intel. On the software and programming side, we evaluate existing parallel programming environments, including the models, languages, compilers, software tools, and operating systems. Some guidelines for program parallelization are provided. We examine data-parallel, shared-variable, message-passing, and implicit programming models. Communication functions and their performance overhead are discussed. Available software tools and communication libraries are also introduced
  • Keywords
    adaptive signal processing; digital signal processing chips; multiprocessing systems; parallel algorithms; parallel architectures; parallel programming; programming environments; radar computing; radar signal processing; software tools; workstations; ASCI TeraFLOP system; Gray T3D; Gray T3E; IBM SP2; Intel; Intel Paragon; adaptive radar signal processing; architectural platforms; clusters of workstations; communication libraries; compiler; compilers; distributed memory architectures; high-performance CPU chips; latency hiding mechanisms; massively parallel processors; parallel programming environments; real time signal processing; scalable parallel computers; software tools; symmetric multiprocessors; system interconnects; Adaptive signal processing; Application software; Central Processing Unit; Concurrent computing; Memory architecture; Parallel programming; Radar signal processing; Signal processing; Software tools; Time factors;
  • fLanguage
    English
  • Journal_Title
    Signal Processing Magazine, IEEE
  • Publisher
    ieee
  • ISSN
    1053-5888
  • Type

    jour

  • DOI
    10.1109/79.526898
  • Filename
    526898