DocumentCode
1482370
Title
The characterization and representation of massively parallel computing structures
Author
Schaefer, David H.
Author_Institution
Dept. of Electr. & Comput. Eng., George Mason Univ., Fairfax, VA, USA
Volume
79
Issue
4
fYear
1991
fDate
4/1/1991 12:00:00 AM
Firstpage
461
Lastpage
468
Abstract
The problem of graphical representations for massively parallel computers is addressed. Concise graphical representations that provide details of individual processing elements, describe their interconnections, and delineate the function of control signals are needed. Various types of massively parallel depictions in use are presented, as well as methods under development that utilize computational schemata and Petri nets
Keywords
Petri nets; parallel processing; Petri nets; characterization; graphical representations; interconnections; massively parallel computing structures; processing elements; representation; Boolean functions; Concurrent computing; Control systems; Flip-flops; Integrated circuit interconnections; Logic; Parallel processing; Petri nets; Registers; Signal processing;
fLanguage
English
Journal_Title
Proceedings of the IEEE
Publisher
ieee
ISSN
0018-9219
Type
jour
DOI
10.1109/5.92040
Filename
92040
Link To Document