Design of a 1.8 GHz low-noise amplifier for RF front-end in a 0.8 μm CMOS technology

Author

Park, Sungkyung ; Kim, Wonchan

Author_Institution

Sch. of Electr. Eng., Seoul Nat. Univ., South Korea

Volume

47

Issue

1

fYear

2001

fDate

2/1/2001 12:00:00 AM

Firstpage

10

Lastpage

15

Abstract

CMOS technologies are widely exploited now in the area of a few-GHz-range radio frequency (RF) circuits as well as in the area of baseband circuits. Accordingly, the CMOS low-noise amplifier (LNA) is gaining its popularity, tailored to the applications such as GSM, PCS, IMT-2000, and wireless LAN. In this paper, compact and comprehensive design strategies for CMOS LNA are presented. Basic topologies are compared and analyzed using key equations newly derived. Using these strategies, an LNA based upon LC resonance using on-chip spiral inductors is designed and investigated. This LNA, targeted for 1.8 GHz PCS, exhibits power gain of about 18 dB and noise figure (NF) of about 2.1 dB by both theory and post-layout simulation under a 0.8-μm CMOS process and 3-V supply

Keywords

CMOS integrated circuits; UHF amplifiers; VLSI; inductors; integrated circuit design; network topology; noise; personal communication networks; 0.8 mum; 1.8 GHz; CMOS LNA; CMOS technology; GSM; IMT-2000; LC resonance; PCS; RF circuits; RF front-end; UHF; VLSI; baseband circuits; circuit topologies; low-noise amplifier design; noise figure; on-chip spiral inductors; post-layout simulation; power gain; radio frequency circuits; wireless LAN; Baseband; CMOS technology; Circuit topology; Equations; GSM; Low-noise amplifiers; Personal communication networks; Radio frequency; Resonance; Wireless LAN;

fLanguage

English

Journal_Title

Consumer Electronics, IEEE Transactions on

Publisher

ieee

ISSN

0098-3063

Type

jour

DOI

10.1109/30.920413

Filename

920413