Parallel iterative matching-based cell scheduling algorithm for high-performance ATM switches

Many cell scheduling algorithms for input-buffered ATM switches have been proposed since head-of-line (HOL) blocking which limits the maximum throughput can be significantly reduced by proper cell scheduling. Even though various probabilistic iterative matching (PIM) algorithms have been presented to perform cell scheduling based on the reserved bandwidth, the throughput of each link is not stable, especially with bursty traffic. To improve the scheduling performance while guaranteeing the reserved bandwidth, we propose a probabilistic parallel iterative matching (PPIM) algorithm. The proposed PPIM allocates a weight to every cell transmission request and it makes the grant probability for each input proportional to the reserved bandwidth. The simulation results show that the proposed algorithm can provide more stable link-utilization and higher throughput than other cell scheduling algorithms