Title :
A 100 W 5.1-Channel Digital Class-D Audio Amplifier With Single-Chip Design
Author :
Liu, Jia-Ming ; Chien, Shih-Hsiung ; Kuo, Tai-Haur
Author_Institution :
Dept. of Electr. Eng., Nat. Cheng-Kung Univ., Tainan, Taiwan
fDate :
6/1/2012 12:00:00 AM
Abstract :
A 100 W, 5.1-channel, single-chip, digital-input class-D audio amplifier with a low-voltage (LV) digital circuit and high-voltage (HV) switching power stage is designed for moderate-performance and cost-effective speaker systems. The LV portion, including multi-channel audio processors, delta-sigma modulators (DSMs), and pulse-width modulation (PWM) generators, is implemented with a standard CMOS digital cell-library. A dual-loop resonator is proposed to increase the stable input range of the DSM so that the low-distortion output power of the class-D amplifier can be increased. For the HV portion, distortion caused by parasitic resistances of the power stage is analyzed to obtain a better design. A multi-phase PWM switching technique is proposed to prevent the multi-channel output stages from simultaneously switching, and thus the supply bouncing can be reduced. An over-current protection circuit with high supply noise immunity is also presented. Fabricated with 0.35/3-μm 3.3/18-V 1P3M CMOS technology, the 5.1-channel amplifier achieves a total root-mean-square (RMS) output power of 100 W, a distortion of less than 0.7%, and a power efficiency of 88% with a total chip area of 48.9 mm2.
Keywords :
CMOS digital integrated circuits; audio-frequency amplifiers; delta-sigma modulation; electric resistance; integrated circuit design; integrated circuit noise; low-power electronics; mean square error methods; microprocessor chips; pulse width modulation; 1P3M CMOS technology; 5.1-channel single-chip digital-input class-D audio amplifier; DSM; HV portion; HV switching power stage; LV portion; PWM generator; RMS output power; cost-effective speaker system; delta-sigma modulator; dual-loop resonator; efficiency 88 percent; high supply noise immunity; high-voltage switching power; low-distortion output power; low-voltage digital circuit; multichannel audio processor; multichannel output stage; multiphase PWM switching; over-current protection circuit; parasitic resistance; power 100 W; power efficiency; pulse-width modulation; root-mean-square output power; single-chip design; size 0.35 mum; size 3 mum; standard CMOS digital cell-library; supply bouncing; voltage 18 V; voltage 3.3 V; Logic gates; Periodic structures; Pulse width modulation; Signal to noise ratio; Switches; 5.1-channel; DSM; SDM; audio amplifier; class-D amplifier; delta-sigma modulator; power stage; pulse-width modulation (PWM);
Journal_Title :
Solid-State Circuits, IEEE Journal of
DOI :
10.1109/JSSC.2012.2188465