Title :
Multilayer Obstacle-Avoiding X-Architecture Steiner Minimal Tree Construction Based on Particle Swarm Optimization
Author :
Genggeng Liu ; Xing Huang ; Wenzhong Guo ; Yuzhen Niu ; Guolong Chen
Author_Institution :
Coll. of Math. & Comput. Sci., Fuzhou Univ., Fuzhou, China
Abstract :
As the basic model for very large scale integration routing, the Steiner minimal tree (SMT) can be used in various practical problems, such as wire length optimization, congestion, and time delay estimation. In this paper, an effective algorithm based on particle swarm optimization is presented to construct a multilayer obstacle-avoiding X-architecture SMT (ML-OAXSMT). First, a pretreatment strategy is presented to reduce the total number of judgments for the routing conditions around obstacles and vias. Second, an edge transformation strategy is employed to make the particles have the ability to bypass the obstacles while the union-find partition is used to prevent invalid solutions. Third, according to the feature of ML-OAXSMT problem, we design an edge-vertex encoding strategy, which has the advantage of simple and effective. Moreover, a penalty mechanism is proposed to help the particle bypass the obstacles, and reduce the generation of via at the same time. Experimental results show that our algorithm from a global perspective of multilayer structure can achieve the best solution quality among the existing algorithms. Finally, to our best knowledge, we redefine the edge cost and then construct the obstacle-avoiding preferred direction X-architecture Steiner tree, which is the first work to address this problem and can offer the theory supports for chip design based on non-Manhattan architecture.
Keywords :
VLSI; combinatorial mathematics; integrated circuit design; particle swarm optimisation; ML-OAXSMT; chip design; edge transformation strategy; edge-vertex encoding strategy; multilayer obstacle-avoiding x-architecture Steiner minimal tree construction; multilayer structure; non-Manhattan architecture; particle swarm optimization; penalty mechanism; pretreatment strategy; routing conditions; union-find partition; Algorithm design and analysis; Encoding; Nonhomogeneous media; Pins; Routing; Steiner trees; Wires; Multilayer routing; Steiner minimal tree (SMT); X-architecture; particle swarm optimization (PSO); preferred direction; very large scale integration (VLSI);
Journal_Title :
Cybernetics, IEEE Transactions on
DOI :
10.1109/TCYB.2014.2342713