Synthesizing Multiple Scan Trees to Optimize Test Application Time

This layout-aware, interconnect-driven multiple-scan-tree synthesis methodology applies a density-driven dynamic-clustering algorithm to determine scan cells in each scan tree. The method uses a compatibility-based clique partition algorithm to determine tree topology, and a Voronoi diagram to establish physical connections. It achieves higher test data compression and far lower test application time, with lower routing length and test power consumption, than previous methods.