DocumentCode
1483335
Title
Error secure/propagating concept and its application to the design of strongly fault-secure processors
Author
Nanya, Takashi ; Kawamura, Toshiaki
Author_Institution
Dept. of Comput. Sci., Tokyo Inst. of Technol., Japan
Volume
37
Issue
1
fYear
1988
fDate
1/1/1988 12:00:00 AM
Firstpage
14
Lastpage
24
Abstract
A concept of the error-secure and the error-propagating interfaces of the subsystems in a digital system is introduced, and shown to be useful for practical design and verification for a strongly fault-secure system which is known to achieve the totally self-checking (TSC) goal. A sufficient condition is shown for subsystem interfaces to meet for it to be possible to construct a strongly fault-secure system with no checkers used to monitor the embedded interfaces. On the basis of the error-secure/propagating concept, a design is presented for a strongly fault-secure microprocessor which implements the instruction set of Intel´s i8080 8-b microprocessor. In the design, a complete set of building blocks is defined and all the partial interfaces are verified for the error secure/propagating property. Only four checkers are used at the embedded interfaces in the resulting strongly fault-secure processor
Keywords
automatic testing; computer architecture; computer interfaces; fault tolerant computing; microprocessor chips; 8 bit; Intel 8080; digital system; error-propagating interfaces; error-secure interfaces; strongly fault-secure processors; totally self-checking systems; Built-in self-test; Circuit faults; Combinational circuits; Computer science; Condition monitoring; Digital systems; Fault detection; Helium; Microprocessors; Sufficient conditions;
fLanguage
English
Journal_Title
Computers, IEEE Transactions on
Publisher
ieee
ISSN
0018-9340
Type
jour
DOI
10.1109/12.75147
Filename
75147
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