DocumentCode :
1483352
Title :
Multipipeline networking for compound vector processing
Author :
Hwang, Kai ; Xu, Zhiwei
Author_Institution :
Dept. of Electr. Eng.-Syst., Univ. of Southern California, Los Angeles, CA, USA
Volume :
37
Issue :
1
fYear :
1988
fDate :
1/1/1988 12:00:00 AM
Firstpage :
33
Lastpage :
47
Abstract :
An efficient vector-processing technique is proposed; it is based on a novel concept of multipipeline networking, which is generalized from the techniques of pipeline chaining and systolization. The authors also present the design principles of pipeline nets and provide programming, compiling and run-time techniques for converting scientific programs into pipeline net implementations. Performance analysis of the pipeline net is provided with projected performance of various Livermore loops implemented with pipeline nets of various sizes
Keywords :
parallel architectures; parallel programming; performance evaluation; pipeline processing; program compilers; Livermore loops; compilation; compound vector processing; multipipeline networking; performance analysis; pipeline chaining; pipeline nets; programming; run-time techniques; scientific programs; systolization; vector-processing; Arithmetic; Hardware; Matrices; National electric code; Parallel processing; Pipeline processing; Polynomials; Signal processing; Supercomputers; Systolic arrays;
fLanguage :
English
Journal_Title :
Computers, IEEE Transactions on
Publisher :
ieee
ISSN :
0018-9340
Type :
jour
DOI :
10.1109/12.75149
Filename :
75149
Link To Document :
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