• DocumentCode
    14838
  • Title

    Efficient error detection in multiple way tables

  • Author

    Reviriego, Pedro ; Maestro, Juan Antonio

  • Author_Institution
    Dept. de Ing. Inf., Univ. Antonio de Nebrija, Madrid, Spain
  • Volume
    51
  • Issue
    1
  • fYear
    2015
  • fDate
    1 8 2015
  • Firstpage
    50
  • Lastpage
    52
  • Abstract
    Multiple way tables in which items can be placed on several buckets are used in many computing applications. Some examples are cache memories and multiple hash tables structures. In most cases, the items are stored in electronic memories that are prone to soft errors that can corrupt the stored items. To avoid data corruption, memories can be protected with a parity bit or with an error correction code. It is shown that most single bit errors can be detected in multiple way tables without adding a parity bit. This can be done by placing the items in a predetermined order in the multiple ways of the table.
  • Keywords
    cache storage; error correction codes; error detection codes; radiation hardening (electronics); cache memories; data corruption avoidance; efficient error detection; electronic memory; error correction code; multiple hash table structures; multiple way tables; parity bit; single bit errors; soft errors;
  • fLanguage
    English
  • Journal_Title
    Electronics Letters
  • Publisher
    iet
  • ISSN
    0013-5194
  • Type

    jour

  • DOI
    10.1049/el.2014.3769
  • Filename
    7006830