Heavy-Ion Induced Threshold Voltage Shifts in Sub 70-nm Charge-Trap Memory Cells

Author

Gerardin, Simone ; Bagatin, Marta ; Paccagnella, Alessandro ; Visconti, Angelo ; Greco, Eugenio

Author_Institution

DEI, Univ. di Padova, Padova, Italy

Volume

58

Issue

3

fYear

2011

fDate

6/1/2011 12:00:00 AM

Firstpage

827

Lastpage

833

Abstract

We investigate threshold voltage shifts induced by heavy ions in sub 70-nm charge-trap cells, based on TaN-Al₂O₃-SiN-SiO₂-Si (TANOS) stack and compare the results with floating gate memories. Large shifts are observed, although to a smaller extent than in floating gate devices with similar feature size. Basic mechanisms leading to the heavy-ion induced charge loss/compensation in the storage layer are discussed, considering hole injection from the blocking and the tunnel oxide. The applicability of the transient conductive path and the transient carrier flux models developed for floating gate memories is evaluated as well.

Keywords

aluminium compounds; integrated circuit modelling; integrated memory circuits; silicon compounds; tantalum compounds; TANOS stack; TaN-Al₂O₃-SiN-SiO₂-Si; blocking oxide; floating gate devices; floating gate memories; heavy-ion induced charge loss; heavy-ion induced threshold voltage shifts; hole injection; size 70 nm; sub charge-trap memory cells; transient carrier flux; transient conductive path; tunnel oxide; Charge carrier processes; Ions; Logic gates; Radiation effects; Silicon; Threshold voltage; Transient analysis; Charge trap; heavy ions; non-volatile memories; single event upsets;

fLanguage

English

Journal_Title

Nuclear Science, IEEE Transactions on

Publisher

ieee

ISSN

0018-9499

Type

jour

DOI

10.1109/TNS.2011.2122269

Filename

5740623