Title :
SiO2 interface layer effects on microwave loss of high-resistivity CPW line
Author :
Wu, Yunhong ; Gamble, Harold S. ; Armstrong, B. Mervyn ; Fusco, Vincent F. ; Stewart, J. A Carson
Author_Institution :
Dept. of Electr. & Electron. Eng., Queen´´s Univ., Belfast, UK
fDate :
1/1/1999 12:00:00 AM
Abstract :
For a coplanar waveguide (CPW) line where the metal conductor is in direct contact with the HR-Si substrate, the microwave losses are low but are sensitive to DC bias due to DC leakage current. With a continuous SiO2 layer inserted between the CPW metallization and HR-Si substrate, DC leakage is eliminated, but microwave losses increase. An MOS C-V analysis shows that an induced charge layer exists on the substrate surface and is the principle cause for increased line losses. If the insulated SiO2 layer beneath the conductor strips of line is made to be noncontinuous, then microwave losses are decreased from 18 to 3 dB/cm at 30 GHz
Keywords :
MIS structures; MMIC; coplanar waveguides; insulating thin films; leakage currents; losses; silicon; silicon compounds; 30 GHz; CPW metallization; DC bias; DC leakage current; MOS C-V analysis; Si; Si MMIC; Si substrate; SiO2 interface layer effects; SiO2-Si; continuous SiO2 layer; coplanar waveguide line; high-resistivity CPW line; induced charge layer; line losses; metal conductor; microwave loss; noncontinuous SiO2 layer; Capacitance-voltage characteristics; Conducting materials; Conductivity; Conductors; Coplanar waveguides; Insulation; Leakage current; Metal-insulator structures; Silicon; Substrates;
Journal_Title :
Microwave and Guided Wave Letters, IEEE
