DocumentCode
1484659
Title
Efficient Hardware Implementation of Fp-Arithmetic for Pairing-Friendly Curves
Author
Fan, Junfeng ; Vercauteren, Frederik ; Verbauwhede, Ingrid
Author_Institution
Dept. of Electr. Eng., Katholieke Univ. Leuven, Leuven-Heverlee, Belgium
Volume
61
Issue
5
fYear
2012
fDate
5/1/2012 12:00:00 AM
Firstpage
676
Lastpage
685
Abstract
This paper describes a new method to speed up IFp-arithmetic in hardware for pairing-friendly curves, such as the well-known Barreto-Naehrig (BN) curves. We explore the characteristics of the modulus defined by these curves and choose curve parameters such that IFp multiplication becomes more efficient. The proposed algorithm uses Montgomery reduction in a polynomial ring combined with a coefficient reduction phase using a pseudo-Mersenne number. As an application, we show that the performance of pairings on BN curves in hardware can be significantly improved, resulting in a factor 2.5 speedup compared with state-of-the-art hardware implementations.
Keywords
computational complexity; curve fitting; Barreto-Naehrig curves; Montgomery reduction; coefficient reduction phase; hardware implementation; pairing-friendly curves; polynomial ring; pseudo-Mersenne number; Bismuth; Computers; Elliptic curves; Hardware; Polynomials; Security; Pairing-friendly curves; modular reduction.;
fLanguage
English
Journal_Title
Computers, IEEE Transactions on
Publisher
ieee
ISSN
0018-9340
Type
jour
DOI
10.1109/TC.2011.78
Filename
5740859
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