Estimation of heat transfer in SOI-MOSFETs

Heat flow in MOSFETs built on separation by implantation of oxygen (SIMOX) wafers is described and quantified. Silicon-on-insulator (SOI) structures are examined numerically to show the influence of connection lines and different materials on the heat transport. Correct boundary conditions for device simulation and analytical expressions for compact models are derived. Designers of short- and narrow-channel devices should be aware of an error in the range of 10% due to neglecting the influence of the interconnection lines. Test devices may not be typical for a device in VLSI circuits, as their thermal resistances may be significantly lower. Device parameters should be extracted from pulsed measurements and at raised ambient temperature. Pads should be kept at least 100 μm away from the test devices. Thermal resistances of SOI devices are not significantly larger than the resistances of bulk devices under VLSI conditions and will be about one order of magnitude larger under test conditions. The absolute value can be calculated from a simple formula that is verified by numerical simulations. Bulk and SOI technologies are compared