• DocumentCode
    1484770
  • Title

    Reducing power consumption of turbo-code decoder using adaptive iteration with variable supply voltage

  • Author

    Leung, Oliver Yuk-Hang ; Tsui, Chi-ying ; Cheng, Roger Shu-kwan

  • Author_Institution
    Perception Digital, Clear Water Bay, Hong Kong
  • Volume
    9
  • Issue
    1
  • fYear
    2001
  • Firstpage
    34
  • Lastpage
    41
  • Abstract
    Turbo-code becomes popular for the next generation wireless communication systems because of its remarkable coding performance. One of the problems for decoding turbo-code in the receiver is the complexity and the high power consumption since multiple iterations of Soft Output Viterbi Algorithm (SOVA) or Maximum a posteriori (MAP) decoding have to be carried out to decode a data frame. To reduce the complexity of the turbo-code decoder, adaptive iteration based on cyclic redundancy checking (CRC) and output convergence approaches has been proposed to reduce the average number of iterations required for decoding a data frame. This results in a system that has variable workload since the amount of computation required for decoding each data frame is different. In this work, we propose a dynamic voltage scaling approach to further reduce the power consumption. Different from other variable workload systems, the workload here is not known at the time when the data is being decoded. Thus, optimum voltage assignment is not feasible. We propose several heuristic algorithms to assign supply voltage for different decoding iterations. Simulation results show that significant reduction of power consumption is achieved comparing with the system using fixed supply voltage.
  • Keywords
    Viterbi decoding; adaptive decoding; iterative decoding; low-power electronics; maximum likelihood decoding; turbo codes; adaptive iteration; cyclic redundancy checking; digital communication; dynamic voltage scaling; heuristic algorithm; low-power VLSI; maximum a posteriori algorithm; output convergence; power consumption; receiver; soft output Viterbi algorithm; system-level design; turbo code decoder; variable supply voltage; wireless communication system; Convergence; Cyclic redundancy check; Dynamic voltage scaling; Energy consumption; Iterative algorithms; Iterative decoding; Turbo codes; Very large scale integration; Viterbi algorithm; Wireless communication;
  • fLanguage
    English
  • Journal_Title
    Very Large Scale Integration (VLSI) Systems, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    1063-8210
  • Type

    jour

  • DOI
    10.1109/92.920817
  • Filename
    920817