Title :
Design and analysis of a dynamically reconfigurable three-dimensional FPGA
Author :
Chiricescu, Silviu ; Leeser, Miriam ; Vai, M. Michael
Author_Institution :
Digital DNA Syst. Archit. Lab., Motorola Inc., Schaumburg, IL, USA
Abstract :
This paper presents the design and analysis of a dynamically reconfigurable field programmable gate array (FPGA) that consists of three physical layers: routing and logic block layer, routing layer, and memory layer. The architecture was developed using a methodology that examines different architectural parameters and how they affect different performance criteria such as speed, area, and reconfiguration time. The resulting architecture has high performance while the requirement of balancing the areas of its constituent layers is satisfied.
Keywords :
field programmable gate arrays; reconfigurable architectures; dynamically reconfigurable architecture; logic block layer; memory layer; routing layer; three-dimensional field programmable gate array; Computer architecture; Field programmable gate arrays; Logic design; Logic devices; Optical interconnections; Physical layer; Programmable logic arrays; Reconfigurable logic; Routing; Very large scale integration;
Journal_Title :
Very Large Scale Integration (VLSI) Systems, IEEE Transactions on
