DocumentCode :
1484914
Title :
Reconfigurable VLSI architectures for evolvable hardware: from experimental field programmable transistor arrays to evolution-oriented chips
Author :
Stoica, Adrian ; Zebulum, Ricardo ; Keymeulen, Didier ; Tawel, Raoul ; Daud, Taher ; Thakoor, Anil
Author_Institution :
Jet Propulsion Lab., California Inst. of Technol., Pasadena, CA, USA
Volume :
9
Issue :
1
fYear :
2001
Firstpage :
227
Lastpage :
232
Abstract :
Evolvable hardware (EHW) addresses on-chip adaptation and self-configuration through evolutionary algorithms. Current programmable devices, in particular the analog ones, lack evolution-oriented characteristics. This paper proposes an evolution-oriented field programmable transistor array (FPTA), reconfigurable at transistor level. The FPTA allows evolutionary experiments with reconfiguration at various levels of granularity. Experiments in SPICE simulations and directly on a reconfigurable FPTA chip demonstrate how the evolutionary approach can be used to automatically synthesize a variety of analog and digital circuits.
Keywords :
SPICE; VLSI; circuit CAD; evolutionary computation; integrated circuit design; programmable circuits; reconfigurable architectures; SPICE simulation; VLSI chip; adaptive computing; analog circuit; automatic synthesis; digital circuit; evolution-oriented reconfigurable architecture; evolutionary algorithm; evolvable hardware; field programmable transistor array; Biological cells; Circuit simulation; Circuit synthesis; Digital circuits; Evolutionary computation; Field programmable analog arrays; Genetics; Hardware; Space technology; Very large scale integration;
fLanguage :
English
Journal_Title :
Very Large Scale Integration (VLSI) Systems, IEEE Transactions on
Publisher :
ieee
ISSN :
1063-8210
Type :
jour
DOI :
10.1109/92.920839
Filename :
920839
Link To Document :
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