Title :
Current problems in v.l.s.i. testing and testability
Author_Institution :
University of York, Department of Computer Science, York, UK
fDate :
10/1/1984 12:00:00 AM
Abstract :
This paper presents the basic concepts in testing, beginning with fault-models, and summarizes the major contributions to the design of testable logic. It identifies some of the current problems in v.l.s.i. testing and testability which need further investigation.
Keywords :
VLSI; integrated logic circuits; logic testing; VLSI; fault-models; testability; testable logic; testing;
Journal_Title :
Radio and Electronic Engineer
DOI :
10.1049/ree.1984.0100
