• DocumentCode
    1485485
  • Title

    Using Data Postcompensation and Predistortion to Tolerate Cell-to-Cell Interference in MLC nand Flash Memory

  • Author

    Dong, Guiqiang ; Li, Shu ; Zhang, Tong

  • Author_Institution
    Dept. of Electr., Comput., & Syst. Eng., Rensselaer Polytech. Inst., Troy, NY, USA
  • Volume
    57
  • Issue
    10
  • fYear
    2010
  • Firstpage
    2718
  • Lastpage
    2728
  • Abstract
    With the appealing storage-density advantage, multilevel-per-cell (MLC) NAND Flash memory that stores more than 1 bit in each memory cell now largely dominates the global Flash memory market. However, due to the inherent smaller noise margin, the MLC NAND Flash memory is more subject to various device/circuit variability and noise, particularly as the industry is pushing the limit of technology scaling and a more aggressive use of MLC storage. Cell-to-cell interference has been well recognized as a major noise source responsible for raw-memory-storage reliability degradation. Leveraging the fact that cell-to-cell interference is a deterministic data-dependent process and can be mathematically described with a simple formula, we present two simple yet effective data-processing techniques that can well tolerate significant cell-to-cell interference at the system level. These two techniques essentially originate from two signal-processing techniques being widely used in digital communication systems to compensate communication-channel intersymbol interference. The effectiveness of these two techniques have been well demonstrated through computer simulations and analysis under an information theoretical framework, and the involved design tradeoffs are discussed in detail.
  • Keywords
    NAND circuits; flash memories; cell-to-cell interference; communication channel intersymbol interference; computer simulation; data postcompensation; data processing technique; deterministic data dependent process; digital communication system; global flash memory market; memory cell; multilevel-per-cell NAND flash memory; noise source; predistortion; signal processing technique; storage density advantage; technology scaling; CMOS technology; Circuit noise; Degradation; Error correction codes; Flash memory; Interference; Nonvolatile memory; Predistortion; Semiconductor device noise; Threshold voltage; Cell-to-cell interference; nand flash memory; postcompensation; predistortion;
  • fLanguage
    English
  • Journal_Title
    Circuits and Systems I: Regular Papers, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    1549-8328
  • Type

    jour

  • DOI
    10.1109/TCSI.2010.2046966
  • Filename
    5460923