Design and realization of a digital ΔΣ modulator for fractional-n frequency synthesis

Author

Kenny, Terrence P. ; Riley, Thomas A D ; Filiol, Norman M. ; Copeland, Miles A.

Author_Institution

Cadence Design Syst., Ottawa, Ont., Canada

Volume

48

Issue

2

fYear

1999

fDate

3/1/1999 12:00:00 AM

Firstpage

510

Lastpage

521

Abstract

The basic operation of a fractional-n frequency synthesizer has been published, but to date little has been presented on the digital ΔΣ modulators which are required to drive such synthesizers. This paper provides a tutorial overview, which relates digital ΔΣ modulation to other applications of ΔΣ modulation where the literature is more complete. The paper then presents a digital ΔΣ modulator architecture which is economical and efficient and which is practical to realize with commercially available components in comparison with other possible implementations which require extensive custom very large-scale integration (VLSI). A demonstration is made of a 28-b modulator using the architecture presented, which provides a 25-MHz tuning bandwidth and <1-Hz frequency resolution. The modulator is demonstrated in an 800-MHz frequency synthesizer having phase noise of -90 dBC/Hz at a 30-kHz offset

Keywords

VLSI; digital integrated circuits; frequency synthesizers; phase noise; radio receivers; sigma-delta modulation; 25 MHz; 30 kHz; 800 MHz; custom VLSI; digital ΔΣ modulator; fractional-n frequency synthesis; frequency offset; frequency resolution; multichannel radio receiver; phase noise; tuning bandwidth; tutorial overview; very large-scale integration; Communication system control; Counting circuits; Delta modulation; Digital modulation; Frequency conversion; Frequency modulation; Frequency synthesizers; Noise level; Phase locked loops; Quantization;

fLanguage

English

Journal_Title

Vehicular Technology, IEEE Transactions on

Publisher

ieee

ISSN

0018-9545

Type

jour

DOI

10.1109/25.752575

Filename

752575