• DocumentCode
    1485908
  • Title

    A two´s complement cellular array multiplier

  • Author

    Pekmestzi, K.Z. ; Papadopoulos, G.D.

  • Author_Institution
    Nuclear Research Centre `Demokritos¿, Electronics Department, Athens, Greece
  • Volume
    51
  • Issue
    2
  • fYear
    1981
  • fDate
    2/1/1981 12:00:00 AM
  • Firstpage
    94
  • Lastpage
    96
  • Abstract
    A cellular array for the multiplication of signed binary numbers is presented. The implementation is based on the direct addition of the partial products. The addition of the negative partial products is performed with a new method which yields a fully cellular array. Furthermore, the proposed array multiplier has an iterative cell interconnection pattern and it is well suited for large-scale integration.
  • Keywords
    cellular arrays; multiplying circuits; LSI; iterative cell interconnection pattern; two´s complement cellular array multiplier;
  • fLanguage
    English
  • Journal_Title
    Radio and Electronic Engineer
  • Publisher
    iet
  • ISSN
    0033-7722
  • Type

    jour

  • DOI
    10.1049/ree.1981.0011
  • Filename
    5269669
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=1485908