Title :
A two´s complement cellular array multiplier
Author :
Pekmestzi, K.Z. ; Papadopoulos, G.D.
Author_Institution :
Nuclear Research Centre `Demokritos¿, Electronics Department, Athens, Greece
fDate :
2/1/1981 12:00:00 AM
Abstract :
A cellular array for the multiplication of signed binary numbers is presented. The implementation is based on the direct addition of the partial products. The addition of the negative partial products is performed with a new method which yields a fully cellular array. Furthermore, the proposed array multiplier has an iterative cell interconnection pattern and it is well suited for large-scale integration.
Keywords :
cellular arrays; multiplying circuits; LSI; iterative cell interconnection pattern; two´s complement cellular array multiplier;
Journal_Title :
Radio and Electronic Engineer
DOI :
10.1049/ree.1981.0011