Optimization of access points for automatic test program generation and fault location in large analogue circuits and systems

The paper develops a methodology for the automatic test program generation (ATPG) for a large analogue circuit subject to component drifts. An optimization algorithm developed selects the best set of intermediate access points for a.c. and d.c. tests of the circuit. During ATPG, faults are simulated by varying each component over a wide range. Voltages measured at all available nodes are thus used in the pre-processing stage of node selection. An optimization procedure based on the discriminating power of measurements and separability between fault signatures is used to select the best set of frequencies applicable for all nodes in a.c. testing. A preamplifier and control amplifier of 56 components is chosen as Unit Under Test (UUT) to demonstrate the ATPG. The fault isolation scheme used is based on the nearest neighbour rule. The rexlationship between diagnosability and number of test features is shown to follow the customary Pareto type curve. However, four carefully chosen nodes and three carefully chosen test frequencies are shown to give an adequate level of diagnosability. The whole scheme is implemented automatically using a minicomputer interfaced to the UUT.