DocumentCode :
1486492
Title :
The impact of exploiting instruction-level parallelism on shared-memory multiprocessors
Author :
Pai, Vijay S. ; Ranganathan, Parthasarathy ; Abdel-Shafi, Hazim ; Adve, Sarita
Author_Institution :
Dept. of Electr. & Comput. Eng., Rice Univ., Houston, TX, USA
Volume :
48
Issue :
2
fYear :
1999
fDate :
2/1/1999 12:00:00 AM
Firstpage :
218
Lastpage :
226
Abstract :
Current microprocessors incorporate techniques to aggressively exploit instruction-level parallelism (ILP). This paper evaluates the impact of such processors on the performance of shared-memory multiprocessors, both without and with the latency-hiding optimization of software prefetching. Our results show that, while ILP techniques substantially reduce CPU time in multiprocessors, they are less effective in removing memory stall time. Consequently, despite the inherent latency tolerance features of ILP processors, we find memory system performance to be a larger bottleneck and parallel efficiencies to be generally poorer in ILP-based multiprocessors than in previous generation multiprocessors. The main reasons for these deficiencies are insufficient opportunities in the applications to overlap multiple load misses and increased contention for resources in the system. We also find that software prefetching does not change the memory bound nature of most of our applications on our ILP multiprocessor, mainly due to a large number of late prefetches and resource contention. Our results suggest the need for additional latency hiding or reducing techniques for ILP systems, such as software clustering of load misses and producer-initiated communication
Keywords :
instruction sets; performance evaluation; shared memory systems; instruction-level parallelism; latency-hiding optimization; memory bound; memory stall time; memory system performance; performance; producer-initiated communication; resource contention; shared-memory multiprocessors; software clustering; software prefetching; Application software; Communication system software; Delay; Microprocessors; Performance analysis; Prefetching; Processor scheduling; Software performance; Software systems; System performance;
fLanguage :
English
Journal_Title :
Computers, IEEE Transactions on
Publisher :
ieee
ISSN :
0018-9340
Type :
jour
DOI :
10.1109/12.752663
Filename :
752663
Link To Document :
بازگشت