DocumentCode :
1486600
Title :
The LRPD test: speculative run-time parallelization of loops with privatization and reduction parallelization
Author :
Rauchwerger, Lawrence ; Padua, David A.
Author_Institution :
Dept. of Comput. Sci., Texas A&M Univ., College Station, TX, USA
Volume :
10
Issue :
2
fYear :
1999
fDate :
2/1/1999 12:00:00 AM
Firstpage :
160
Lastpage :
180
Abstract :
Current parallelizing compilers cannot identify a significant fraction of parallelizable loops because they have complex or statically insufficiently defined access patterns. As parallelizable loops arise frequently in practice, we advocate a novel framework for their identification: speculatively execute the loop as a doall and apply a fully parallel data dependence test to determine if it had any cross-iteration dependences; if the test fails, then the loop is reexecuted serially. Since, from our experience, a significant amount of the available parallelism in Fortran programs can be exploited by loops transformed through privatization and reduction parallelization, our methods can speculatively apply these transformations and then check their validity at run-time. Another important contribution of this paper is a novel method for reduction recognition which goes beyond syntactic pattern matching: it detects at run-time if the values stored in an array participate in a reduction operation, even if they are transferred through private variables and/or are affected by statically unpredictable control flow. We present experimental results on loops from the PERFECT Benchmarks, which substantiate our claim that these techniques can yield significant speedups which are often superior to those obtainable by inspector/executor methods
Keywords :
parallel processing; parallelising compilers; program testing; Fortran programs; LRPD test; PERFECT Benchmarks; fully parallel data dependence test; parallelizable loops; parallelizing compilers; privatization; reduction parallelization; speculative run-time parallelization of loops; syntactic pattern matching; Algorithm design and analysis; Circuit simulation; Computational modeling; Computer science; Parallel processing; Pattern matching; Pattern recognition; Privatization; Runtime; Testing;
fLanguage :
English
Journal_Title :
Parallel and Distributed Systems, IEEE Transactions on
Publisher :
ieee
ISSN :
1045-9219
Type :
jour
DOI :
10.1109/71.752782
Filename :
752782
Link To Document :
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