DocumentCode :
148725
Title :
Advanced vertical interconnect technology with high density interconnect and conductive paste
Author :
Tsunoda, Takahiro ; Kasai, Ryouhei ; Yuki, Shozo ; Ota, Naoki ; Sawada, Kazuaki ; Yamamoto, Yusaku ; Fukuoka, Yoshitaka ; Sagara, Suguru
Author_Institution :
Electron. Syst. Center, Dai Nippon Printing Co., Ltd., Fujimino, Japan
fYear :
2014
fDate :
23-25 April 2014
Firstpage :
50
Lastpage :
54
Abstract :
Advanced vertical interconnect technology that combines traditional HDI (high density interconnect) structures feature micro-vias and conductive paste-vias was developed to fabricate multilayer printed circuit board, such as ultra-multilayer printed circuit board like probe card or IC testing board, having excellent electrical performance, mechanical reliability and mass productivity at reasonable cost. This advanced multilayer printed circuit board constituted of high elastic modulus thermosetting dielectric composition with interstitial via holes (IVH) and/or Cu micro-vias (HDI), besides sintered conductive paste-vias buried in low elastic modulus thermosetting dielectric composition. The latter composition will properly act as mechanical buffering layer of vertical interconnection between upper and lower multilayer boards. This paper discuss about manufacturing process factor, that is pre-curing temperature, affecting the optimum electrical performance at the interface of HDI Cu lands and conductive paste with interposing low elastic modulus dielectric material in the first place. In the second place, analysis of observations for the micro structure and sintering condition at the interface of conductive paste and HDI Cu land by using SEM and energy dispersive X-ray spectrometry (EDX). In addition, mechanical reliabilities, estimated by using structural analysis method and signal transmission properties by way of this buried conductive paste using frequency and time-domain simulation analyses were discussed.. From these results, this advanced vertical interconnect technology with sintered conductive paste and low elastic dielectric has sufficient mechanical reliability and electrical property for passing high-speed signal up to 15 Gbps.
Keywords :
X-ray chemical analysis; copper; crystal microstructure; curing; dielectric materials; elastic moduli; frequency-domain analysis; integrated circuit reliability; integrated circuit testing; printed circuit interconnections; printed circuit manufacture; scanning electron microscopy; sintering; time-domain analysis; vias; Cu; Cu lands; Cu microvias; EDX; HDI; IC testing board; IVH; SEM; advanced vertical interconnect technology; dielectric material; elastic modulus; electrical performance; energy dispersive X-ray spectrometry; frequency-domain simulation; high density interconnect; interstitial via holes; manufacturing process factor; mass productivity; mechanical buffering layer; mechanical reliability; microstructure; pre-curing temperature; printed circuit board fabrication; probe card; signal transmission properties; sintered conductive paste-vias; thermosetting dielectric composition; time-domain simulation; ultramultilayer printed circuit board; Analytical models; Atmospheric measurements; Dielectrics; Glass; Nonhomogeneous media; Particle measurements; Reliability; Interconnectionsin Substrate; Low transmission signal losses; Sintered conductive paste-vias;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electronics Packaging (ICEP), 2014 International Conference on
Conference_Location :
Toyama
Print_ISBN :
978-4-904090-10-7
Type :
conf
DOI :
10.1109/ICEP.2014.6826659
Filename :
6826659
Link To Document :
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