5/10-Gb/s Burst-Mode Clock and Data Recovery Based on Semiblind Oversampling for PONs: Theoretical and Experimental

In this paper, we demonstrate a 5/10-Gb/s burst-mode clock and data recovery circuit (BM-CDR) for passive optical network (PON) applications. The BM-CDR is based on a phase-tracking oversampling (semiblind) CDR circuit operated at twice the bit rate and a clock phase aligner that makes use of a simple phase-picking algorithm for automatic clock phase acquisition. The design provides low latency and fast response without requiring a reset signal from the network layer. We experimentally test the proposed BM-CDR in a 20-km PON uplink. The BMCDR achieves a bit error rate (BER) <; 10^-10 and packet loss ratio (PLR) <; 10^-6 while featuring: 1) instantaneous (0 preamble bit) phase acquisition for any phase step (±27π rad) between successive bursts; 2) BER and PLR sensitivities of -24.2 and -25.4 dBm, respectively; 3) negligible burst-mode sensitivity penalty of 0.8 dB; 4) frequency acquisition range of 242 MHz; 5) consecutive identical digit (CID) immunity of 3100 bits; and 6) dynamic range of 3 dB. With the instantaneous phase acquisition, we predict the physical efficiency of the upstream PON traffic to be 99%. We also present a unified probabilistic theory for conventional CDRs, N times oversampling CDRs in either time or space, and BM-CDRs built from oversampling CDRs. This theory can quantitatively explain the performance of these circuits in terms of the BER and PLR. The theoretical model accounts for the following parameters: 1) silence period, including phase step and CIDs, between consecutive packets; 2) finite frequency offset between the sampling clock and data rate; 3) preamble length; 4) jitter on the sampling clock; and 5) pattern correlator error resistance. On the basis of this theory, we perform a comprehensive theoretical analysis to assess the tradeoffs between these parameters, and compare the results experimentally to validate the theoretical model.