DocumentCode :
148829
Title :
Room temperature wafer scale bonding of electroplated Au patterns processed by surface planarization
Author :
Kurashima, Yuichi ; Maeda, Atsushi ; Takagi, Hiroyuki
Author_Institution :
Res. Center for Ubiquitous MEMS & Micro Eng. (UMEMSME), Nat. Inst. of Adv. Ind. Sci. & Technol. (AIST), Tsukuba, Japan
fYear :
2014
fDate :
23-25 April 2014
Firstpage :
380
Lastpage :
383
Abstract :
We demonstrate a newly-developed replication process of a surface shape from an atomically smooth master substrate onto electroplated Au patterns by a lift-off process using a thin sacrificial layer. An atomically smooth Au surface with a root mean square surface roughness of 0.8 nm could be replicated from the master substrate by this process. Then we examined its applicability to room-temperature Au-Au bonding in atmosphere. A high bonding strength of about 250 MPa was obtained. Fracture from the bulk of the Si substrates was observed after tensile tests, which was also the case for the thermocompression bonding at 200 °C.
Keywords :
electroplating; gold; lead bonding; micromechanical devices; planarisation; silicon; substrates; surface roughness; tensile testing; wafer bonding; Au-Au; Si; bonding strength; electroplated patterns; gold surface; lift-off process; master substrate; replication process; room temperature wafer scale bonding; root mean square surface roughness; surface planarization; surface shape; temperature 200 degC; tensile tests; thermocompression bonding; thin sacrificial layer; Bonding; Gold; Rough surfaces; Silicon; Substrates; Surface roughness; Surface treatment; Au-Au bonding; electroplating; lift-off; room-temperature bonding; sacrifical layer;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electronics Packaging (ICEP), 2014 International Conference on
Conference_Location :
Toyama
Print_ISBN :
978-4-904090-10-7
Type :
conf
DOI :
10.1109/ICEP.2014.6826713
Filename :
6826713
Link To Document :
بازگشت