Title :
Design and test of large embedded memories: An overview
Author :
Rajsuman, Rochit
Author_Institution :
Advantest America R&D Centre, Santa Clara, CA, USA
fDate :
5/1/2001 12:00:00 AM
Abstract :
Large on-chip memories are desirable but difficult to implement. Challenges range from design automation to fabrication to test algorithms and memory redundancy and repair
Keywords :
electronic design automation; integrated circuit testing; integrated memory circuits; design and test; embedded memories; memory redundancy; on-chip memories; test algorithms; Capacitors; Conductors; Design automation; Dielectrics; Fabrication; Logic; Manufacturing processes; Random access memory; Semiconductor device manufacture; Testing;
Journal_Title :
Design & Test of Computers, IEEE
