Title :
Using electrical bitmap results from embedded memory to enhance yield
Author :
Segal, Julie ; Jee, Alvin ; Lepejian, David ; Chu, Baptiste
Author_Institution :
HPL, San Jose, CA, USA
fDate :
5/1/2001 12:00:00 AM
Abstract :
Analyzing bitmap results can provide insight into physical failure mechanisms normally acquired only through the complex, time-consuming, and expensive process of failure analysis
Keywords :
failure analysis; integrated circuit testing; integrated memory circuits; bitmap results; electrical bitmap; embedded memory; failure analysis; yield; Automatic testing; Built-in self-test; Circuit faults; Circuit testing; Data analysis; Failure analysis; Logic circuits; Logic testing; Random access memory; Vehicles;
Journal_Title :
Design & Test of Computers, IEEE
