Title :
Automatic generation of parallel CRC circuits
Author :
Sprachmann, Michael
Author_Institution :
Dependable Comput. Syst., Wien, Austria
Abstract :
A parallel CRC circuit simultaneously processes multiple data bits. A generic VHDL description of parallel CRC circuits lets designers synthesize CRC circuits for any generator polynomial or required amount of parallelism.
Keywords :
data communication; error detection; hardware description languages; logic design; automatic generation; generator polynomial; generic VHDL description; multiple data bits; parallel CRC circuits; Automatic logic units; Circuit synthesis; Circuit testing; Cyclic redundancy check; Decoding; Encoding; Logic circuits; Parallel processing; Polynomials; System testing;
Journal_Title :
Design & Test of Computers, IEEE
